Designing System on a Chip Products using Systems Engineering Tools

Referring to Figure 3, Systems Engineering spans a very broad range of activities, from architectural assessment through verification. Systems engineering subsumes co-design and co-verification and pushes tools use into the arena of systems analysis (using such tools as MathLab) and architectural assessment early in the design process and enables major structural change and re-evaluation late in the design cycle - cache sizing, the effect of incorporating different operating systems and the decision to incorporate hardware or software implementations of special processors into a product or family
of products.

Tools which support hardware-software design need to simulate both hardware and software and to preserve timing accuracy of the simulated hardware, the software and the interactions across the hardware software interface. Co-verification is a term which encompasses many tools from the system level through to the circuit level. For detailed simulation the extraction of circuit characteristics is important in the determination of the maximum operating frequencies of processors and control systems. The speed and accuracy of the co-verification tools is limited by the models used for CPUs, which are the executors of software and form the bridge between the software world and the hardware world.